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Marvell Technology

Senior Staff Power Design Engineer

Posted 3 Days Ago
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In-Office
Bangalore, Bengaluru Urban, Karnataka
Senior level
In-Office
Bangalore, Bengaluru Urban, Karnataka
Senior level
The role involves working on ASIC digital design, physical implementation, and power supply integrity checks, ensuring low power design, collaborating with cross-functional teams, and performing various design cycles including floorplanning and placement.
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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

This position is with Power signoff team part of The Central Engineering PD group at Marvell, Bangalore. This team is part of global Implementation team that plays a key role in Netlist to GDS implementation, covering Synthesis, P&R, Timing, PV and Power implementation all custom ASICs for all the OEM’s. We are looking for a strong technical individual contributor having experience in low power design using industry standard tools.

What You Can Expect

  • Work on digital design for ASICs, Physical Implementation, Power Supply integrity checks Low Power design & Signoff
  • Work on complete SoC design cycle of ASICs, starting from Architecture definition, feasibility planning/benchmarking for Power/Performance/Area/Yield to end-to-end design/Implementation/Signoff
  • Work on challenging design architecture across Networking, Processor, Computing, automotive, Connectivity and Security, in the technology nodes across 3nm/5nm/7nm and more.
  • Collaborate with cross-functional teams including RTL design, verification, and DFT to optimize power.
  • Perform floorplanning, placement, clock tree synthesis, routing, and physical verification.

What We're Looking For

  • Bachelor’s or Master's degree in Computer Science, Electrical Engineering or related fields and 10+ years of related professional experience.
  • Exposure on ASIC Physical implementation, Layout and Semiconductor device/process through previous work/intern experience or course work.
  • Experience in power analysis, estimation, and optimization flow.
  • Understanding of Physical Design and EM/IR flow
  • Expertise in Tcl and PERL.
  • Experience in Physical design is preferable.
  • Scripting/programming using Tcl/Tk/Perl/Python/Shell
  • Detail oriented, self-motivated team worker, good verbal, and written communication skills.
  • Strong Digital Design concepts and debugging skills.

#LI-MN1

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

#LI-MN1

Top Skills

Perl
Python
Shell
Tcl
Tcl/Tk

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