Jobs at Ericsson

The Senior Test Engineer is responsible for testing, administering, and troubleshooting customer application systems, primarily within IT and telecommunications, utilizing manual and automated test case design.

Lead software architecture and technology standardization across service delivery. Define architecture standards, design cloud-native, scalable secure solutions, guide engineering teams, drive DevSecOps/CI-CD adoption, evaluate technologies, ensure governance and reuse, and support POCs and continuous improvement.

The Technology Architect will lead AI architecture governance, establish standards for AI applications, and ensure alignment with enterprise goals. Responsibilities include overseeing production AI deployments, promoting best practices, and collaborating on AI initiatives across the organization.

The Senior Software Architect - AI will design scalable AI platforms, manage architectural decisions for enterprise solutions, and guide teams on AI model lifecycles.

The Software Architect will lead solution design and development of backend services, APIs, and cloud-native platforms, focusing on Java and Spring Boot, while ensuring architecture consistency and performance optimization.

Lead the architecture and delivery of full-stack solutions, focusing on UI, microservices, and cloud-native platforms while mentoring engineers and overseeing technical governance.

Verify ASIC IP at block and subsystem levels using SystemVerilog/UVM. Define verification strategies, build UVM testbenches, develop and debug directed/randomized tests, implement scoreboards/checkers/BFMs, use SVA, collaborate across teams, document verification lifecycle, and improve verification methodologies.

Design and own ASIC IP blocks and subsystems for 5G/6G, produce RTL and documentation, perform RTL sign-off and static checks, optimize design methodologies, collaborate with architects and verification teams, and drive cross-team delivery.

Lead and execute ASIC IP verification at block and subsystem level using UVM/SystemVerilog. Develop verification strategies, tests, checkers, scoreboards, and BFMs; run, debug, document tests; improve methodologies; collaborate across teams to meet project deliverables.

Design and develop ASIC IP blocks and subsystems for 5G/6G SoCs. Perform RTL digital design and sign-off checks, produce design documentation, optimize methodologies, collaborate with architects and verification teams, and support cross-team delivery.