Teams at Microchip Technology Inc.

Own verification for complex blocks and subsystems within ARM-based SoCs. Develop SystemVerilog and UVM test environments, create test plans and constrained-random tests, manage regressions, analyze code and functional coverage, debug RTL and testbench issues, and collaborate with architects and validation teams. The role also contributes to automation initiatives, methodology improvements, cross-site program leadership, and mentorship of junior engineers.

Design and execute block-level verification for RTL using SystemVerilog and UVM. Develop test plans and testbenches, create and run regression tests, analyze code and functional coverage, integrate with RTL, and collaborate with design teams to debug and resolve issues.

Lead chip-level design and verification for Touch Controller IPs, from specification and architecture through RTL implementation and verification. Contribute to design reviews, documentation, development methodology, project coordination, and cross-functional collaboration.