Develops and optimizes machine learning, computer vision, and numerical libraries for CPUs, GPUs, DSPs, FPGAs, and other accelerators. Responsibilities include algorithmic optimization, parallelization, vectorization, memory and cache optimization, benchmarking, profiling, performance analysis, customer collaboration, and coordination with software and hardware teams. Requires strong C/C++ and parallel programming experience, hardware architecture knowledge, and familiarity with FPGA development tools and AI/ML frameworks.
We are seeking a talented engineer to implement and optimize machine learning, computer vision,
and numeric libraries for target hardware architecture, including CPUs, GPUs, DSPs, and other
accelerators. Your expertise will be instrumental in enabling efficient and high-performance
execution of algorithms on these hardware platforms.
Key Responsibilities:
● Implement and optimize machine learning, computer vision, and numeric libraries for
target hardware architectures, including CPUs, GPUs, DSPs, and other accelerators.
● Work closely with software and hardware engineers to ensure optimal performance on
target platforms.
● Implement low-level optimizations, including algorithmic modifications, parallelization,
vectorization, and memory access optimizations, to fully leverage the capabilities of the
target hardware architectures.
● Work with customers to understand their requirements and implement libraries to meet
their needs.
● Develop performance benchmarks and conduct performance analysis to ensure the
optimized libraries meet the required performance targets.
● Stay current with the latest advancements in machine learning, computer vision, and
high-performance computing.
Qualifications:
● BTech/BE/MTech/ME/MS/PhD degree in CSE/IT/ECE
● > 4 years of experience working in Algorithm Development, Porting, Optimization &
Testing
● Proficient in programming languages such as C/C++, CUDA, OpenCL, or other relevant
languages for hardware optimization.
● Hands-on experience with hardware architectures, including CPUs, GPUs, DSPs, and
accelerators, and familiarity with their programming models and optimization techniques.
● Knowledge of parallel computing, SIMD instructions, memory hierarchies, and cache
optimization techniques.
● Experience with performance analysis tools and methodologies for profiling and
optimization.
● Knowledge of deep learning frameworks and techniques is good to have
● Strong problem-solving skills and ability to work independently or within a team.
Algorithm Engineer (CPU/GPU/DSP/FPGA)
Job Summary
We are looking for an Algorithm Engineer with experience in optimizing software for CPUs, GPUs, DSPs, and FPGAs. The role involves developing high-performance algorithms for machine learning, computer vision, and numerical applications.
Key Responsibilities
- Develop and optimize algorithms for CPUs, GPUs, DSPs, and FPGAs.
- Work on machine learning, computer vision, and numerical libraries.
- Improve application performance through optimization techniques.
- Work closely with software and hardware teams.
- Analyze performance and fix bottlenecks.
- Support customer requirements and deliver optimized solutions.
Required Skills
- B.E./B.Tech./M.E./M.Tech./MS in Computer Science, Electronics, ECE, or related field.
- 4+ years of experience in algorithm development or software optimization.
- Strong programming skills in C/C++.
- Experience with CUDA, OpenCL, or similar parallel programming technologies.
- Experience working with CPUs, GPUs, DSPs, or FPGAs.
- Hands-on experience with FPGA development using VHDL, Verilog, HLS, Xilinx Vivado/Vitis, Intel Quartus, or similar tools.
- Good understanding of performance optimization, parallel computing, and memory optimization.
- Good problem-solving and debugging skills.
Good to Have
- Experience with TensorFlow, PyTorch, or other AI/ML frameworks.
- Knowledge of LLVM, MLIR, or TVM.
- Experience in embedded systems or AI acceleration.
This version is much simpler, recruiter-friendly, and broad enough to attract candidates with either Algorithm Optimization or FPGA acceleration experience.
MulticoreWare Chennai, Tamil Nadu, IND Office
DLF IT Park Block 3, Ground Floor, Mount Poonamallee Road, Manapakkam, , Chennai, TamilNadu , India, 600089
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