As a RTL Integration (Frontend) Engineer at EdgeCortix, you will be responsible for integrating IP into ASSP/SOC and other third-party IP, as well as playing a key role in verification infrastructure development, automation, and improvement.

Seeking a Senior ASIC Implementation Engineer with 4+ years of experience to handle key ASIC implementation tasks including synthesis, timing constraints, power analysis, and participate in physical design activities. Responsibilities also include RTL development and crossdisciplinary problem-solving.

ASIC Program Manager responsible for driving chip roadmap programs, program execution in terms of schedule, performance, power, cost, and quality, risk identification and mitigation, overseeing change control, and communicating with senior management and stakeholders.