Top Design Engineer Jobs in Chennai

Design, develop and integrate building management and controls for modular datacenter MEP systems. Own control architecture, PLC/HMI/SCADA programming, protocols, vendor review, FAT/SAT commissioning, troubleshooting, and mentor junior controls engineers while aligning with cybersecurity and IT requirements.

Senior design engineer responsible for RTRP (GRE/GRP) piping design for oil & gas/petrochemical EPC projects, ensuring compliance with ASME, API and ISO codes, coordinating with clients, attending UAE meetings, and using Aveva E3D/PDMS, SP3D, AutoCAD Plant 3D and CadWorx.

Design, analyze and evaluate airfield pavements (runways, taxiways, aprons) using FAA/ICAO/DGCA and AASHTO methods. Perform thickness, overlay and rehabilitation design; assess aircraft loading and subgrade; use FAARFIELD and COMFAA; review geotechnical inputs; prepare reports, drawings and BOQs; support construction, site investigations, QA, cost estimates and sustainability assessments; coordinate with multidisciplinary teams and communicate findings to stakeholders.

The role involves providing expert support for SolidWorks, conducting training at client sites, and enhancing customer experience through effective communication and best practice recommendations.

The Electrical Designer will develop electrical designs for power distribution and lighting systems, collaborate on projects, and ensure compliance with NEC codes.

Perform structural analysis and design of water/sewage treatment and non-plant steel and concrete structures to Eurocodes. Build analytical models using Robot, STAAD, IDEA StatiCa; prepare calculations, reports, loads and stresses under senior supervision. Provide design input to CAD/BIM, coordinate drawings, and ensure compliance with Arcadis systems and H&S regulations.

Design FACTS system topology and single-line diagrams; specify and evaluate power components; perform harmonic, protection, insulation coordination, loss and reliability studies; coordinate suppliers and multidisciplinary teams; support customer discussions and project/product/application teams; ensure compliance, schedule, budget, and quality across system design deliverables.

Design and develop full-custom analog circuits (amplifiers, ADCs, references, IOs, oscillators, power management). Perform circuit simulations (Cadence tools), collaborate across design, layout, verification, and test teams, support prototype validation and debugging, document results, and mentor junior engineers while staying current with industry trends.

Design and execute projects related to Power Quality Solutions, focusing on control and protection systems, switchgear, and cable engineering.

Design and produce instrumentation and control (I&C) engineering deliverables for industrial/manufacturing projects, including hook-up, wiring/loop sheets, I/O and instrument lists, cable and tray layouts, grounding, BOMs/MTOs, and panel/JB layouts. Collaborate with licensed engineers and multidisciplinary teams, adhere to codes/standards, and meet client deadlines using Revit and AutoCAD.

The role involves leading a team of Physical Design engineers in delivering high-performance silicon products while ensuring adherence to timing, power, and area requirements. Responsibilities include technical leadership, hands-on ownership of critical blocks, automation development, and stakeholder management to meet project milestones.

Perform block- and full-chip DFT for ASIC/SoC designs including boundary-scan, memory BIST, scan insertion with compression, ATPG and pattern verification, gate-level simulation, silicon bring-up and failure debug on ATE, and collaborate with RTL/STA teams to resolve timing and DFT DRC issues.

Lead full-chip or large-block physical implementation from netlist to GDSII. Drive floorplanning, placement, CTS, routing, STA timing closure, DRC/LVS/EM/IR signoff, ECOs, hard-macro integration, PPA optimization, and automation scripting while collaborating with RTL, architecture, verification, and foundry teams.

Lead full-chip and large block physical design from RTL to GDSII across advanced nodes (40nm to 3nm+). Responsibilities include floorplanning, place-and-route, CTS, timing closure, physical verification, IR/EM checks, IP integration, mentoring junior engineers, and using metric-driven flows to achieve first-pass silicon.

Design and verify high-speed mixed-signal communication and high-performance digital circuits. Perform RTL coding, simulation, synthesis, timing closure, verification, and debugging at circuit and behavioral levels. Prepare test methods, specifications, datasheets, and demo boards. Collaborate with analog and digital teams and manage multiple tasks to deliver projects on time.

Own end-to-end UI/UX and frontend implementation: design user flows, craft high-fidelity prototypes, build responsive React+TypeScript interfaces, implement scalable component architecture, integrate with REST/GraphQL APIs, optimize performance, and collaborate with backend and product teams in a regulated life-sciences context.

The Staff Engineer leads analog and mixed-signal block design, conducts design reviews, mentors junior engineers, and develops methodologies for advanced technology applications.

The Design Leader/Sr. Engineer will oversee design deliverables, manage design activities, interface with customers, and ensure compliance with processes while maintaining budgets.

Lead design and release of automotive exterior trim components (bumpers, grilles, spoilers, claddings, etc.). Manage engineering releases, ECRs, BOMs, validation (DV/PV), DFMEA, APQP, and supplier coordination. Ensure manufacturability, regulatory compliance, and product launch readiness while using CAD and PLM tools.

The Physical Design Engineer will take ownership of implementing RTL2GDSII for large SOCs, involving floor-planning, place-and-route, timing closure, and physical verification checks.

Lead the HMID Design team, manage chip-level design processes, collaborate across teams, and contribute to IP specification and verification.

Perform block- and full-chip static timing analysis for ASIC/SoC designs, driving timing closure through synthesis, place-and-route, and signoff. Create and validate STA constraints (SDC), collaborate with RTL, Physical Design, DFT and Signoff teams, support ECO implementations, and optimize timing, area, and power while addressing signal integrity and noise concerns.

Develop BI dashboards and POCs using Design Studio with scripting and charting. Build custom Java (SDK) components, implement visual design and dashboarding, and work with SAP BW/HANA datasources. Senior role requiring 5–7 years' experience.

The Lead PCB Design & Development Engineer will design multilayer PCBs, manage development phases from layout to certification, and collaborate with software teams for function verification.

As a Design Verification Engineer, you will verify designs for analog and mixed signal electronics, develop verification strategies, and collaborate with teams throughout the development process.